Method and apparatus for bit error rate analysis
US7519874B2 · kind B2 · utility
9Cited by
70References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2003 |
| Grant date | Apr 14, 2009 |
| Priority date | — |
| Expiry date | Jan 7, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0334
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for determining a bit error rate. The method comprises the steps of acquiring a data signal by an acquisition unit of a test instrument for a predetermined period of time, and storing the data signal in a memory of the test instrument. A clock signal is recovered from the stored data signal, and in accordance therewith, the stored data signal is sliced into a plurality of data segments of a predetermined length. Each of said data segments is synchronized to a frame or predetermined pattern to determine a bit error rate thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.