Converging repeater methodology for channel-limited SOC microprocessors
US7519933B2 · kind B2 · utility
2Cited by
3References
11Claims
0Family size
Assignee
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Key dates
| Filing date | Sep 21, 2006 |
| Grant date | Apr 14, 2009 |
| Priority date | — |
| Expiry date | Jul 19, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/327
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for inserting repeaters in an integrated circuit includes establishing a set of initial constraints for a given set of buses; assigning at least one repeater corresponding to each of the given set of buses based on the set of initial constraints; progressively relaxing the set of initial constraints to form a new set of constraints for a new set of buses and assigning at least one repeater corresponding to each of the new set of buses based on the new set of constraints; and routing assigned repeaters to each of the new set of buses in the integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.