Switch sequencing circuit systems and methods
US7521969B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 28, 2006 |
| Grant date | Apr 21, 2009 |
| Priority date | — |
| Expiry date | Aug 31, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/094
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Systems and methods are disclosed herein to provide improved I/O techniques. For example, in accordance with an embodiment of the present invention, an integrated circuit includes a driver that receives data signals and provides an output signal based on the data signals, with the driver having a plurality of transistors with a first set of the plurality of transistors adapted to provide a first logical value as the output signal and a second set of the plurality of transistors adapted to provide a second logical value as the output signal based on the data signals. A sequencing circuit provides the data signals to the driver such that the first set of the plurality of transistors is switched on before the second set of the plurality of transistors is switched off, and the second set of the plurality of transistors is switched on before the first set of the plurality of transistors is switched off.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.