Design structure for a serial link output stage differential amplifier
US7522000B2 · kind B2 · utility
0Cited by
7References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 5, 2008 |
| Grant date | Apr 21, 2009 |
| Priority date | — |
| Expiry date | May 5, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45702
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A design structure embodied in a machine readable storage medium for designing, manufacturing, and/or testing a design for protection for the transmission of higher amplitude outputs required of differential amplifiers formed by thin oxide transistors with limited maximum voltage tolerance used where compliance with communication protocol standards requires handling voltages which may, in transition, exceed desirable levels is provided by limiting the voltage across any two device terminals under power down conditions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.