On-chip dead pixel correction in a CMOS imaging sensor
US7522200B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 14, 2003 |
| Grant date | Apr 21, 2009 |
| Priority date | — |
| Expiry date | Aug 3, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/68
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In a MOS imaging array, dead pixels may occur in that if the cell of the pixel has a defect in its PN junction, it may generate current leakage paths, thus causing the cell site to appear as a white spot in the image signal. The number of dead pixels on a CMOS image sensor is dependent on the process quality used for forming the image sensor. The present invention corrects for dead pixels with circuitry that may be fabricated on a single integrated MOS chip. When the MOS imaging device is first turned on, the pixel signals from the cell array are read out and a dead pixel determination method is used to determine dead pixels. A digital referencing scheme is used such that when a dead pixel is located, its digital location is stored in a designated storage area. Then normal data image signal processing begins, with the location of each pixel that is being read out being monitored. When a pixel with a location that corresponds to the stored location for a dead pixel is read out, the signal processing circuitry compensates for the pixel signal rather than providing it as part of the normal image signal. One method by which the signal processing circuitry may compensate for the dead pi…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.