Shifter register for low power consumption application
US7522694B2 · kind B2 · utility
0Cited by
6References
12Claims
0Family size
Assignee
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Key dates
| Filing date | Nov 14, 2007 |
| Grant date | Apr 21, 2009 |
| Priority date | — |
| Expiry date | Nov 14, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C19/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A high voltage shift register stage which directly accepts low voltage clock signal inputs without using clock buffers. In particular, a shift register stage circuit is adapted to operate with a low voltage swing clock signal, with the stage circuit having a single state node, a, driven directly. This arrangement allows for reduced power consumption and higher operating speeds.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.