DC offset correction for use in a radio architecture
US7522900B2 · kind B2 · utility
15Cited by
14References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2001 |
| Grant date | Apr 21, 2009 |
| Priority date | — |
| Expiry date | Jul 29, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/30
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for determining a delay vector from inputs of in-phase and quadrature phase low pass filters to an output of the demodulator of a dual mixer radio receiver and from such delay measurement computing and providing DC offset correction to said receiver.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.