Binary representation of number based on processor word size
US7523150B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 28, 2004 |
| Grant date | Apr 21, 2009 |
| Priority date | — |
| Expiry date | Feb 9, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M7/12
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method of converting a number to a binary representation based on a processor word size is described. In accordance with the method, a predetermined size segment of a number is converted to a binary representation wherein the predetermined size segment is based on the processor word size. Also described is a method of converting a number represented in binary form and comprised of more than one segment, wherein the segment size is determined based on processor word size, to a decimal representation. A first decimal segment resulting from converting a segment of the more than one binary segments to decimal form is combined with a second decimal segment resulting from converting another segment of the more than one binary segments to decimal form.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.