Method and apparatus to verify non-deterministic results in an efficient random manner
US7523367B2 · kind B2 · utility
3Cited by
5References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2005 |
| Grant date | Apr 21, 2009 |
| Priority date | — |
| Expiry date | Aug 2, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31722
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The present invention is directed to a system, method and article of manufacture for testing and design verification of hardware devices by providing for random accesses to the registers of a device under test. Such random accesses may more closely resemble actual accesses to the registers of a device during normal operation, thus providing a more thorough test.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.