Timing loop based on analog to digital converter output and method of use
US7525460B1 · kind B1 · utility
36Cited by
4References
52Claims
0Family size
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Key dates
| Filing date | Jul 10, 2007 |
| Grant date | Apr 28, 2009 |
| Priority date | — |
| Expiry date | Jul 10, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/12
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A device and process to compensate for asymmetrical qualities of an analog input signal, if present, and generate a timing signal. The timing signal is then used for analog to digital conversion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.