Method and apparatus to launch write queue read data in a microprocessor recovery unit
US7526583B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 23, 2005 |
| Grant date | Apr 28, 2009 |
| Priority date | — |
| Expiry date | Oct 3, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318533
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method of checkpointing a microprocessor by providing, in parallel, a current read value from a queue and a next read value from the queue, and then selectively passing one of the current read value and next read value to a capture latch based on an instruction completion signal. The capture latch can directly drive the checkpoint register circuitry in the recovery unit of the microprocessor. If the queue is empty, a pair of multiplexers connected to the input of the register queue array are used to pass the input data value. The instruction completion signal may indicate whether all instructions in an instruction group have successfully completed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.