Method for setting up a serial communication port configuration
US7526584B2 · kind B2 · utility
3Cited by
0References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2006 |
| Grant date | Apr 28, 2009 |
| Priority date | — |
| Expiry date | Apr 1, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4411
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for setting up a serial communication port configuration is disclosed. The method comprises a hardware circuit of a motherboard having a plurality of digital logic gates and a plurality of chips disposed thereon, wherein a process is initiated when the digital logic gates receive a high or low electric potential signal inputted by a general programmable input/output (GPIO), and the processed high or low electric potential signal is transmitted to the chips for further processing and outputting the same to execute setting up of the serial communication port configuration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.