Patent · US Active

Runtime register allocator

US7526609B2 · kind B2 · utility

0Cited by
2References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 26, 2007
Grant dateApr 28, 2009
Priority date
Expiry dateOct 26, 2027

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F12/0862
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Methods and arrangements for accessing a storage structure. Included are an arrangement for providing a storage access instruction, an arrangement for inputting an address into a storage structure data cache responsive to a storage access instruction, an arrangement for extending a storage access instruction with a predicted register number field, the predicted register number field containing a predicted register number corresponding to a speculative location of a load/store operand associated with a storage access instruction, an arrangement for speculatively accessing a storage structure with a storage access instruction extended by the extending arrangement, and an arrangement for reverting to the arrangement for inputting an address if the load/store operand is not in the speculative location.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.