Integrated circuit incorporating wire bond inductance
US7528471B2 · kind B2 · utility
Inventors
Key dates
| Filing date | Oct 11, 2006 |
| Grant date | May 5, 2009 |
| Priority date | — |
| Expiry date | May 13, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention relates to the field of electronics, more particularly to the wire bonds incorporated into an integrated circuit package such as a quad flat pack. a ball grid array or hybrid style module. The present invention takes the normally undesirable wire bond inductance and uses it in an operational circuit where positive inductance is required. The circuit in which the wire bond inductance is used is located primarily in the integrated circuit die housed in the integrated circuit package, but may also include off-die components. In one example, a wire bond is used as the required series inductance in a discrete circuit impedance inverter which consists of two shunt-to-ground negative inductances and one series positive inductance. One of the negative inductances is located on-die, while the other is located off-die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.