Sharing memory within an application using scalable hardware resources
US7529906B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 18, 2003 |
| Grant date | May 5, 2009 |
| Priority date | — |
| Expiry date | Aug 18, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/384
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods include translating a virtual memory address into a physical memory address in a multi-node system that is initiated by providing the virtual memory address at a source node. A determination is made that a translation for the virtual memory address does not exist. A physical node to query is determined based on the virtual memory address. An emulated remote translation table (ERTT) segment is queried on the determined physical node to see if the ERTT segment may provide a translation. If the translation is received then the translation may be loaded into a TLB on the source node. Otherwise a memory reference error may be generated for the entity or application referencing the invalid virtual memory address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.