Lateral SOI semiconductor device

US7531875B2 · kind B2 · utility

Assignee

• Cambridge Semiconductor Limited · GB

Inventors

• Florin Udrea · Cambridge, GB
• David M. Garner · London, GB

Key dates

• Filing date: May 13, 2003
• Grant date: May 12, 2009
• Expiry date: May 13, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/127

Abstract

This invention is generally concerned with semiconductor-on-insulator devices, particularly for high voltage applications. A lateral semiconductor-on-insulator device is described, comprising: a semiconductor substrate; an insulating layer on said semiconductor substrate; and a lateral semiconductor device on said insulator; said lateral semiconductor device having: a first region of a first conductivity type; a second region of a second conductivity type laterally spaced apart from said first region; and a drift region extending in a lateral direction between said first region and said second region; and wherein said drift region comprises at least one first zone and at least one second zone adjacent a said first zone, a said first zone having said second conductivity type, a said second zone being an insulating zone, a said first zone being tapered to narrow towards said first region.