Enhanced CML driver circuit for “quiet-driver” measurement enablement
US7532037B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 5, 2008 |
| Grant date | May 12, 2009 |
| Priority date | — |
| Expiry date | May 5, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31708
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method for enhancing a CML driver circuit to allow efficient, and accurate measurement of the magnitude of the voltage domain noise present near a CML driver in an integrated circuit. The disclosed method for enhancing a CML driver circuit to enable quiet driver measurement includes providing a predetermined low impedance path from the power rail of said CML driver circuit via a first node to the output pins of the circuit and providing a predetermined low impedance path from the ground rail of said CML driver circuit via a second node to the output pins of the circuit. The method also includes disabling the current source causing the pull-up termination circuitry to become high impedance, and the logic driving said inputs of the CML circuit to exist in a low state and performing a low impedance measurement of the power rail noise, ground rail noise and the chip noise in the region of the CML driver.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.