Device and method for biasing a transistor amplifier
US7532074B2 · kind B2 · utility
1Cited by
5References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 9, 2007 |
| Grant date | May 12, 2009 |
| Priority date | — |
| Expiry date | Jul 17, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45622
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A biasing circuit adapted for operative coupling to the first input terminal so as to provide a relatively high biasing impedance to ground at the first input terminal, said biasing circuit being adapted to controllably vary the DC-voltage signal which biases the transistor amplifier, whilst at least one component of the biasing circuit is configured to simultaneously form a low-pass circuit for filtering a noise component of the DC-voltage signal before the DC-voltage signal is provided to the first input terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.