Pipelined amplifier time delay integration
US7532242B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 26, 2004 |
| Grant date | May 12, 2009 |
| Priority date | — |
| Expiry date | Nov 18, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C27/02
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A series of time delay integration TDI stages each integrate a photocurrent from a separate detector such as detectors in an array. In a first stage 20, a first integrator is initialized with a fixed bias 30, and integrates a signal from a first detector 22 during a first time interval. Next, a reset switch 26n causes that integrated first detector signal to bias a second integrator 24n. During a second integration interval, the second integrator integrates a signal from a second detector 22n. Multiple stages may be arranged in series so that an integrated signal from a previous stage biases an integrator in the current stage. At a final stage, an Nth integrator outputs the resulting signal Vfinal. Any bias used to initialize the first integrator is removed from Vfinal to achieve a total integrated signal from the detectors. A bi-directional switch 38 at each stage enables a forward or backward scan of the detectors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.