On-substrate ESD protection for array based image sensors
US7532264B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2004 |
| Grant date | May 12, 2009 |
| Priority date | — |
| Expiry date | Nov 20, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An ESD protection system for an image sensor array includes a two-dimensional array of pixels formed on a substrate. Each of the pixels is connected to a gate line and a data line. The system includes a common ESD bus and at least one ESD protection circuit formed on the substrate. The protection circuit includes: a pair of thin film transistors connected in a back-to-back configuration with a first terminal connected to one of the gate lines, and a second terminal connected to the common ESD bus. Upon the occurrence of an electrostatic discharge onto the gate line causing the voltage across the terminals to exceed a threshold value, the protection circuit discharges the ESD charge from the gate line to the ESD bus, thereby preventing damage to each of the switching transistors in the pixels connected to the gate line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.