Weighted event counting system and method for processor performance measurements
US7533003B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2007 |
| Grant date | May 12, 2009 |
| Priority date | — |
| Expiry date | Dec 5, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/88
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A weighted event counting system and method for processor performance measurements provides low latency and low error performance measurement capability. A weighted performance counter accumulates a performance count according to a plurality of event signals provided from functional units in the processor. Differing weights are applied to the event signals in according to the correlation between each event with processor performance. The weights may be provided from programmable registers, so that the weights can be adjusted under program control. The event signals may be combined to reduce the bit-width of the set of event signal, with mutually-exclusive events merged in single fields of the combinatorial result and events having the same weights merged according to a sub-total. The weights are applied to the combinatorial result and used to update a performance count. The performance count can then be used by power management software or hardware to make adjustments in operating parameters of the processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.