System and method for testing of electronic circuits
US7533312B2 · kind B2 · utility
1Cited by
6References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 29, 2004 |
| Grant date | May 12, 2009 |
| Priority date | — |
| Expiry date | Jun 9, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2894
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The system and method of the present invention combine multiple tests (15) into a batch and submit the batch for processing to exercise electronic circuits, for example, a managed network (25) such as a wireless network. The system and method insure that tests (15) are timely run by utilization of a batch submit trigger (42). When a test (15) has completed, the system and method return the results (11) of that particular test (15) to the user, regardless of whether or not the rest of the tests (15) in the batch have completed execution.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.