Patent · US Active

Asymmetrical random access memory cell, and a memory comprising asymmetrical memory cells

US7535750B2 · kind B2 · utility

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2References

3Claims

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Assignee

International Business Machines Corporation · US

Inventors

Otto Wagner · Edenkoben, DE
Sebastian Ehrenreich · Sonneberg, DE
Torsten Mahnke · Stuttgart, DE
Anthony Gus Aipperspach · Rochester, US

Key dates

Filing date	Jan 16, 2007
Grant date	May 19, 2009
Priority date	—
Expiry date	Jul 20, 2027

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/412
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Asymmetrical random access memory cell (1) including cross coupled inverters (2, 3) which are driven at their nodes (22, 32) by separate bit-lines (blt, blc) of a pair of complementary bit-lines, which are connected via a pass-transistor (21, 31), wherein the random access memory cell is asymmetrical by means of the cross coupled inverters (2, 3) which have asymmetrically physical behaviours whereby different switching thresholds of the inverters are present, and that the pass-transistors (21, 31) are driven by separate controlled wordlines (wl, wwl).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.