Dynamic output buffer circuit
US7538573B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 2007 |
| Grant date | May 26, 2009 |
| Priority date | — |
| Expiry date | Feb 12, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0288
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A dynamic output buffer circuit performs an impedance matching function and a pre-emphasis function by using input and output signals, and consumes relatively less power, occupies a relatively smaller layout area, and dynamically varies an output impedance. The dynamic output buffer circuit dynamically matches an output impedance to the characteristic impedance of a metal line connected to an external circuit, pre-emphasizes at least one input signal, and includes a control circuit and an output circuit. The control circuit matches the output impedance of the dynamic output circuit to the characteristic impedance of the metal line in response to at least one output signal, and outputs a plurality of resistor control signals which are used to pre-emphasize at least one input signal in response to the input signal. The output circuit controls the output impedance and pre-emphasizes the input signal in response to the resistor control signals, and outputs the output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.