Three dimensional integrated circuits
US7538575B2 · kind B2 · utility
4Cited by
73References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 17, 2008 |
| Grant date | May 26, 2009 |
| Priority date | — |
| Expiry date | Apr 17, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A three-dimensional semiconductor device, comprising: a programmable logic circuit; and a configuration circuit comprising a non planar memory element, wherein: a portion of the memory element is positioned above or below the logic circuit; and an output of the memory element is coupled to the logic circuit to program the logic circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.