Coupling integrated circuits in a parallel processing environment
US7539845B1 · kind B1 · utility
111Cited by
13References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 14, 2006 |
| Grant date | May 26, 2009 |
| Priority date | — |
| Expiry date | Apr 14, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8007
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit comprises a plurality of tiles. Each tile comprises a processor, and a switch including switching circuitry to forward data received over data paths from other tiles to the processor and to switches of other tiles, and to forward data received from the processor to switches of other tiles. The integrated circuit further comprises an interface coupled to a plurality of the tiles to transfer data between one or more switches of the tiles and one or more switches of tiles in an externally coupled integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.