Patent · US Active

No-execute processor feature global disabling prevention system and method

US7540026B1 · kind B1 · utility

7Cited by
2References
21Claims
0Family size

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Key dates

Filing dateJan 24, 2005
Grant dateMay 26, 2009
Priority date
Expiry dateJun 22, 2027

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F12/1425
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method includes stalling execution of a model specific register write function to write to a model specific register of a processor having a no-execute processor feature enabled, determining that the model specific register is a no-execute model specific register of the processor, and determining whether a no-execute field in the no-execute model specific register is being altered. Upon a determination that the no-execute field is being altered, the method further includes taking protective action to prevent disabling of the no-execute processor feature.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.