Flat profile structures for bipolar transistors
US7541624B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 21, 2003 |
| Grant date | Jun 2, 2009 |
| Priority date | — |
| Expiry date | Nov 19, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/85
Abstract
A method for fabricating a bipolar transistor includes forming collector, base, and emitter semiconductor layers on a substrate such that the layers form a vertical sequence with respect to an adjacent surface of the substrate. The method includes etching away a portion of a top one of the semiconductor layers to expose a portion of the base semiconductor layer and then, growing semiconductor on the exposed portion of the base layer. The top one of the semiconductor layers is the layer of the sequence that is located farthest from the substrate. The growing causes grown semiconductor to laterally surround a vertical portion of the top one of the semiconductor layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.