Hardware accelerated anti-aliased primitives using alpha gradients
US7542049B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2006 |
| Grant date | Jun 2, 2009 |
| Priority date | — |
| Expiry date | Mar 4, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2200/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods are provided for providing anti-aliasing by introducing a falloff area around a graphics object to be rendered. The falloff area is shaded, using Gouraud shading or texture mapping to reduce the aliasing effects of the graphics object. The outside edge of the falloff area is set to be fully transparent, and the inside edge to an opacity matching the outer edge of the graphics object being rendered. To counteract bloating effects, the graphics object is shrunk by half the width of the falloff area. While the width of the falloff area may vary, generally, the width of the falloff area stays constant. In one embodiment, this width corresponds to the edge or diagonal of the square area mapped to each pixel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.