Recoverable reference clock architecture for SONET/SDH and ethernet mixed bidirectional applications
US7542483B1 · kind B1 · utility
3Cited by
11References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 25, 2003 |
| Grant date | Jun 2, 2009 |
| Priority date | — |
| Expiry date | Jan 21, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/183
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Systems and methods for employing asynchronous transceivers in synchronous data communications. For example, a 10 Gigabit Ethernet transceiver may be used to support SONET/SDH communications with or without G.709 coding. Such a transceiver is clocked with a recovered clock signal when a received synchronous signal is available and with a locally generated clock when no such remotely generated signal is available.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.