Patent · US Active

Ternary content addressable memory embedded in a central processing unit

US7543077B1 · kind B1 · utility

15Cited by

18References

16Claims

0Family size

Assignee

Stragent, LLC · US

Inventors

Walter Clark Milliken · Dover, US
Craig Partridge · Corona, US
Alden Warren Jackson · Brookline, US

Key dates

Filing date	Aug 24, 2001
Grant date	Jun 2, 2009
Priority date	—
Expiry date	Jun 1, 2026

Classification

Technology area (CPC G)Physics
CPC primaryG06F15/16
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An arithmetic logic unit (140) improves the processing of information. The arithmetic logic unit (140) includes a register unit (250), a ternary content addressable memory (260), and an operations unit (270).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.