Control signal synchronization of a scannable storage circuit
US7543205B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 27, 2006 |
| Grant date | Jun 2, 2009 |
| Priority date | — |
| Expiry date | Jun 19, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31726
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A system of control signal synchronization of a scannable storage circuit includes any number of storage circuits interconnected together with logic circuitry to form at least a portion of a functional circuit. Each of the storage circuits may include an input transmission gate to apply any one of a data input and a scan input to a storage element of the storage circuit based on an input circuitry that considers the state of the scan enable signal and a timing signal of a clock associated with the storage element. In addition, a control signal in a master latch of the storage element may synchronously close a hold loop in the master latch when the input transmission gate is opened upon the timing signal of the clock transitioning to a different state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.