Method for enhancing efficiency in mutual exclusion
US7543295B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 17, 2007 |
| Grant date | Jun 2, 2009 |
| Priority date | — |
| Expiry date | Dec 5, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/522
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system of the present invention includes: a memory device which includes a first memory area for storing first information indicating that a first task acquires or attempts to acquire a lock, and a second memory area for storing second information indicating that a second task acquires or attempts to acquire the lock, and in which a time lag may occur between a time when the first task issues a writing instruction and a time when the written content is enabled to be referred to by the second task; a first acquisition section which reads the second memory area after issuing a writing instruction to write the first information to the first memory area in response to a request from the first task, and which makes a reply indicating a success of the lock acquisition on condition that the second information is not read; and a second acquisition section which writes the second information to the second memory area in response to a request from the second task, which enables the written content to be referred to by the first task, which thereafter executes a write-reflection process for enabling the content written in the first memory area by the first task to be referred to by the seco…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.