Method and system for allowing code to be securely initialized in a computer
US7543335B2 · kind B2 · utility
7Cited by
107References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 25, 2005 |
| Grant date | Jun 2, 2009 |
| Priority date | — |
| Expiry date | Jun 2, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/575
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory controller prevents CPUs and other I/O bus masters from accessing memory during a code (for example, trusted core) initialization process. The memory controller resets CPUs in the computer and allows a CPU to begin accessing memory at a particular location (identified to the CPU by the memory controller). Once an initialization process has been executed by that CPU, the code is operational and any other CPUs are allowed to access memory (after being reset), as are any other bus masters (subject to any controls imposed by the initiated code).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.