Process for forming CMOS devices using removable spacers
US7544556B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 12, 2004 |
| Grant date | Jun 9, 2009 |
| Priority date | — |
| Expiry date | Jan 17, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0133
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for forming CMOS devices is disclosed in which disposable spacers are used to obtain a structure having improved gap-fill characteristics. First, gate film stacks are formed on the substrate. A shallow implant process is performed so as to form shallow source/drain implant regions. A layer of oxide and a layer of silicon nitride are deposited and etched to form a first set of spacers that extend on opposite sides of the gate film stacks. A second implant is performed so as to form intermediate source/drain implant regions. A set of disposable spacers are then formed that extend on opposite sides of each of the gate film stacks. A third implant process is performed so as to form deep source/drain implant regions. The disposable spacers are then removed, providing more space for the subsequently-formed contact to land.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.