Semiconductor memory device
US7545683B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 10, 2007 |
| Grant date | Jun 9, 2009 |
| Priority date | — |
| Expiry date | Jun 11, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device arranged for minimizing the duration of time required for conducting a batch verify action and thus speeding up a buffer write action is provided. The device which conducts a write action to memory cells in an address area, a batch verify action for collectively conducting verify action for a plurality of addresses, and repeats the batch verify action and the write action, comprises a detecting means for detecting whether or not each address contains an unwritten memory cell, and conducts a verify action at least at a part of the batch verify action excluding at least a part of addresses judged not to contain unwritten memory cells by the verify action at one or more cycles before.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.