Patent · US Active

Method and system for reducing cache tag bits

US7546417B1 · kind B1 · utility

8Cited by
3References
1Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 15, 2008
Grant dateJun 9, 2009
Priority date
Expiry dateJul 15, 2028

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/1044
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method of accessing data from a cache is disclosed. Tag bits of data among sets and ways of cache lines are divided into common subtags and remaining subtags. Similarly, an access address tag is divided into an address common subtag and address remaining tag. When the index of an access address selects a set, a match comparison of the address common subtag and the selected set common subtag is performed. Also, the address remaining tag and selected set remaining subtags are compared for matching before the selected set and associated data is supplied to the requester.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.