System and method for managing power consumption and data integrity in a computer system
US7546418B2 · kind B2 · utility
13Cited by
7References
22Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 20, 2003 |
| Grant date | Jun 9, 2009 |
| Priority date | — |
| Expiry date | Apr 22, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for managing power consumption and data integrity in a computer system is disclosed in which the a memory controller of the computer system records in a buffer the addresses of writes to system memory that occur during the period that the processor is in a low power state. When the processor exits the low power state, the processor invalidates in its internal cache those cache lines that correspond to the addresses recorded in the buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.