PLL with switched parameters
US7548122B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 2006 |
| Grant date | Jun 16, 2009 |
| Priority date | — |
| Expiry date | Jul 9, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/18
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system and method of operating a phase-locked loop frequency synthesizer is disclosed herein. The disclosed method includes defining a first set of operating parameters applicable to operation of a phase-locked loop of the synthesizer in a first mode and defining a second set of operating parameters applicable to operation of the phase-locked loop in a second mode. A first detection signal is generated so as to initiate transition of the phase-locked loop into the second mode. The method further includes configuring, at least in part in response to the first detection signal, the phase-locked loop to operate in accordance with the second set of operating parameters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.