Electrostatic discharge protection structures for high speed technologies with mixed and ultra-low voltage supplies

US7548401B2 · kind B2 · utility

Assignees

• Sarnoff Corporation · US
• Sarnoff Europe BVBA · BE

Inventors

• Markus Mergens · Plainsboro, US
• Cornelius Christian Russ · Diedorf, DE
• John Armer · Middlesex, US
• Koen Gerard Maria Verhaege · Gistel, BE

Key dates

• Filing date: Jun 22, 2006
• Grant date: Jun 16, 2009
• Expiry date: Jun 22, 2026

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D18/251

Abstract

An electrostatic discharge (ESD) protection circuit in a semiconductor integrated circuit (IC) having protected circuitry is provided herein. In one embodiment, a circuit for protecting an integrated circuit from ESD includes a protected circuit node in the integrated circuit, a multiple stage transistor pump circuit coupled to the protected circuit node, and an electrostatic discharge protection circuit having a trigger coupled to the multiple stage transistor pump circuit. The multiple stage transistor pump circuit may comprise a Darlington transistor pump circuit.