Logic cell with two isolated redundant outputs, and corresponding integrated circuit
US7550992B2 · kind B2 · utility
3Cited by
8References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 18, 2006 |
| Grant date | Jun 23, 2009 |
| Priority date | — |
| Expiry date | Aug 26, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The disclosure relates to a logic cell for an integrated circuit, including two redundant outputs, a first output equipped with an output transistor of type P and a second output equipped with an output transistor of type N. Such a cell includes isolation element connecting the first and second outputs and forming an isolation resistance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.