Programmable logic device with on-chip nonvolatile user memory
US7550994B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 29, 2007 |
| Grant date | Jun 23, 2009 |
| Priority date | — |
| Expiry date | Jan 29, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1776
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable logic integrated circuit has user-accessible nonvolatile memory for use by the programmable logic. In a specific embodiment, the programmable logic integrated circuit has a programmable logic array portion and a nonvolatile memory array portion. The nonvolatile memory array portion is segregated into a boot data part and a user data partition. The boot data partition holds data for configuring the programmable logic portion on power up, and the user data partition is for use by the programmable logic. A user can store and retrieve data from the user data partition. A built-in oscillator can be programmably connected from the nonvolatile memory portion to the PLD portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.