Systems and methods for providing shared attribute evaluation circuits in a graphics processing unit
US7551176B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 24, 2006 |
| Grant date | Jun 23, 2009 |
| Priority date | — |
| Expiry date | Oct 9, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T15/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and method for providing shared attribute evaluation circuits in a graphics processing unit are provided. One embodiment can be described as a system for evaluating attributes in a graphics processing unit having a plurality of processing stages. The system can include an evaluation block, configured to process a plurality of attributes corresponding to a plurality of pixels and a plurality of FIFO buffers, each configured between one of the plurality of processing stages and the evaluation block. An embodiment can further include a shared buffer, configured to store the plurality of attributes or pointers during the attribute processing and processing priority logic, configured to determine a plurality of priorities corresponding to the plurality of attributes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.