Multi-level memory cell sensing
US7551489B2 · kind B2 · utility
3Cited by
31References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2005 |
| Grant date | Jun 23, 2009 |
| Priority date | — |
| Expiry date | May 28, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5645
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-level cell memory device performs a read by providing a stepped voltage waveform on a wordline, and comparing cell currents to a substantially constant reference current. Prior to the application of the stepped voltage waveform, the wordline may share charge with another circuit node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.