Power supply circuit and semiconductor memory
US7551507B2 · kind B2 · utility
11Cited by
7References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 14, 2007 |
| Grant date | Jun 23, 2009 |
| Priority date | — |
| Expiry date | Nov 14, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A power supply circuit outputs different set potentials in response to control signals, wherein a voltage detecting circuit changes levels of a first reference potential and a second reference potential in response to inputs of control signals, and a clock generating circuit increases a frequency of the frequency divided clock signal when the levels of the first reference potential and the second reference potential are greatly changed in response to the inputs of the control signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.