Systems and methods for using synthetic instructions in a virtual machine
US7552426B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 14, 2003 |
| Grant date | Jun 23, 2009 |
| Priority date | — |
| Expiry date | Oct 9, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2009/45566
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention compensates for the shortcomings in x86 processor architectures by providing a set of “synthetic instructions” that cause a trap and thereby provide an opportunity for the virtual machine (VM) to process the instructions safely. By using instructions that are “illegal” to the x86 architecture, but which are nonetheless understandable by a virtual machine, the method of using these synthetic instructions to perform well-defined actions in the virtual machine that are otherwise problematic when performed by traditional instructions to an x86 processor but provide much-improved processor virtualization for x86 processor systems.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.