Semiconductor device having a compensation capacitor in a mesh structure
US7557398B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 11, 2006 |
| Grant date | Jul 7, 2009 |
| Priority date | — |
| Expiry date | Jun 21, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/09
Abstract
The compensation capacitor includes: a charge accumulating element having a diffusion layer, a dielectric layer, and a gate electrode layer, wherein the gate electrode layer, the dielectric layer, and the diffusion layer are stacked in this order, and at least partially overlap with each other when viewed from a direction of stacking; a metal layer for applying a voltage to the diffusion layer, the metal layer being formed above the charge accumulating element; and a contact for electrically connecting the diffusion layer and the metal layer, the contact extending between the diffusion layer and the metal layer in the direction of stacking. The gate electrode layer has a form of a mesh which extends in a direction which is perpendicular to the direction of stacking. The contact extends through an aperture of the mesh of the gate electrode layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.