Pipelined/cyclic architectures for analog-digital signal conversion
US7557742B2 · kind B2 · utility
4Cited by
5References
18Claims
0Family size
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Key dates
| Filing date | Dec 20, 2007 |
| Grant date | Jul 7, 2009 |
| Priority date | — |
| Expiry date | Dec 20, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/438
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus for the conversion of analog signals into digital signals using second order or higher sigma-delta modulators in pipelined or cyclic architectures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.