Memory mapped register file and method for accessing the same
US7558942B1 · kind B1 · utility
166Cited by
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20Claims
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Key dates
| Filing date | Jan 25, 2006 |
| Grant date | Jul 7, 2009 |
| Priority date | — |
| Expiry date | Jan 25, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3858
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system comprises a processor to process instructions. A plurality of pipeline stages to execute instructions including a register file. The register file includes a memory unit having a plurality of memory locations, each memory location being addressable by an encoded address. The encoded address corresponds to at least one register and processing mode. Input ports receive inputs for addressing at least one of the memory locations using an encoded address. Output ports to output data from at least one of the memory locations using an encoded address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.