Method of acceptance for semiconductor devices
US7560946B2 · kind B2 · utility
5Cited by
10References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 10, 2007 |
| Grant date | Jul 14, 2009 |
| Priority date | — |
| Expiry date | Jan 9, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2884
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method of accepting semiconductor chips is provided using on-chip parametric measurements. An on-chip parametric measurement structure is determined for each parameter in a set of parametric acceptance criteria. An on-chip parametric measurement macro is included in a design of each semiconductor chip for each identified on-chip parametric measurement structure. Each on-chip parametric measurement macro is tested to determine compliance of the semiconductor chip to the set of parametric acceptance criteria. Compliance to the set of parametric acceptance criteria is validated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.